This invention generally relates to semiconductor circuit fabrication, and more specifically relates to antifuses in semiconductor devices.
The proliferation of electronics in the modern world is due in large part to the development of integrated circuit semiconductor devices. Because these devices are designed and used for widely differing applications, it is often beneficial to have the ability to xe2x80x9ccustomizexe2x80x9d a semiconductor device during fabrication. Customization of a semiconductor device involves changing the device circuitry to meet specific needs, as when, for example, the input and output structure of a device is optimized to allow the device to be used in a particular application.
Often, it is not cost effective to create separate fabrication lines, with different masks and other associated fabrication features, for small changes in the circuit requirements of a device. For this reason, a variety of techniques have been developed in which a device intended for a particular application may be fabricated on a fabrication line together with devices intended for many other applications, and then customized to conform to the particular application""s specific requirements. In one customization technique, an existing circuit path may be cut by blowing a fuse that has been placed in the path for that purpose. Unfortunately, the use of fuses for device customization has inherent limitations. Specifically, a fuse can only be used to break a circuit path; it cannot be used to close an open circuit. Instead, customization where a previously open connection must be closed requires the use of an xe2x80x9cantifuse.xe2x80x9d Antifuses are structures that, when first fabricated, are an open circuit. When the antifuse is xe2x80x9cfused,xe2x80x9d the open circuit becomes closed and conduction across the antifuse becomes possible. Conventionally, an antifuse is fused by applying a sufficient voltage, called a xe2x80x9cprogramming voltagexe2x80x9d across the antifuse structure. This voltage causes a current to flow through the structure and fuse it together, resulting in a permanent electrical connection. This is referred to as a xe2x80x9cprogramming event.xe2x80x9d
The existing antifuse technology has several disadvantages. For example, many existing antifuses require electrodes made of specific types of metal, which are not always compatible with common fabrication technologies. For instance, some devices require a transparent electrode and thus cannot use electrodes made of aluminum or polysilicon, which are opaque. Furthermore, some antifuse structures require a programming voltage of 12-15 volts. Applying such a voltage to the antifuse can cause damage to other circuit elements, and thus these antifuses may be incompatible with low-voltage semiconductor devices that commonly operate, for example, at 3.3 volts or 2.5 volts. Additionally, these antifuse structures will be difficult to scale to the significantly smaller sizes that will be required as semiconductor device density increases. Another significant problem with existing antifuse technology is the relatively high, or unstable, post-program resistance exhibited by the antifuse, which may interfere with desired performance.
Therefore, an object of the invention is to provide an improved structure and method for semiconductor device customization. Another object is to provide an antifuse structure that has a low programming voltage and low post-program resistance.
In a first aspect, the present invention fills these needs by providing a semiconductor device having an increased intersection perimeter between edge regions of a first conductor and portions of a second conductor. The intersection perimeter is a region where the insulation between the conductors tends to be at its thinnest, thus directing the breakdown of the dielectric material, and increasing the likelihood that the antifuse programming event will be successful. In one embodiment, the intersection perimeter comprises the region where the perimeter of a gate structure overlaps an active area, or other doped area.
In another embodiment of the invention, the portion of a current path that travels through a highly doped area is increased while the portion of the path that travels through a non-highly doped area is decreased. This decreases post-program resistance, leading to better response time for the device. The increase of the intersection perimeter, as well as the decrease in post-program resistance, may be accomplished as a part of the normal processing steps for the device.